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cortex m0+: Fix bug doing read modify write on set only registers #1006

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cortex m0+: Fix bug doing read modify write on set only registers #1006

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8 changes: 4 additions & 4 deletions core/src/cpus/cortex_m/m0plus.zig
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Original file line number Diff line number Diff line change
Expand Up @@ -174,23 +174,23 @@ pub const NestedVectorInterruptController = extern struct {
}

pub fn enable(nvic: *volatile NestedVectorInterruptController, num: comptime_int) void {
nvic.ISER |= 1 << num;
nvic.ISER = 1 << num;
}

pub fn disable(nvic: *volatile NestedVectorInterruptController, num: comptime_int) void {
nvic.ICER |= 1 << num;
nvic.ICER = 1 << num;
}

pub fn is_pending(nvic: *volatile NestedVectorInterruptController, num: comptime_int) void {
return nvic.ISPR & (1 << num) != 0;
}

pub fn set_pending(nvic: *volatile NestedVectorInterruptController, num: comptime_int) void {
nvic.ISPR |= 1 << num;
nvic.ISPR = 1 << num;
}

pub fn clear_pending(nvic: *volatile NestedVectorInterruptController, num: comptime_int) void {
nvic.ICPR |= 1 << num;
nvic.ICPR = 1 << num;
}
};

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