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6 changes: 6 additions & 0 deletions .github/workflows/test-configs.yml
Original file line number Diff line number Diff line change
Expand Up @@ -548,6 +548,12 @@ jobs:
arch: aarch64
config-file: ./config/examples/zynqmp.config

versal_vmk180_test:
uses: ./.github/workflows/test-build-aarch64.yml
with:
arch: aarch64
config-file: ./config/examples/versal_vmk180.config

sim_wolfhsm_test:
uses: ./.github/workflows/test-build.yml
with:
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37 changes: 24 additions & 13 deletions arch.mk
Original file line number Diff line number Diff line change
Expand Up @@ -78,23 +78,34 @@ ifeq ($(ARCH),AARCH64)
HASH_HAL=1
CFLAGS+=-DWOLFBOOT_ZYNQMP_CSU
endif
else
ifeq ($(TARGET),nxp_ls1028a)
ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72
endif

CFLAGS +=-ffunction-sections -fdata-sections
LDFLAGS+=-Wl,--gc-sections
ifeq ($(TARGET),versal)
# AMD Versal ACAP (VMK180) - Dual Cortex-A72
ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72
CFLAGS+=-DWOLFBOOT_DUALBOOT
# Support detection and skip of U-Boot legacy header
CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
endif

ifeq ($(DEBUG_UART),0)
CFLAGS+=-fno-builtin-printf
endif
ifeq ($(TARGET),nxp_ls1028a)
ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72

SPI_TARGET=nxp
else
# By default disable ARM ASM for other targets
NO_ARM_ASM?=1
CFLAGS +=-ffunction-sections -fdata-sections
LDFLAGS+=-Wl,--gc-sections

ifeq ($(DEBUG_UART),0)
CFLAGS+=-fno-builtin-printf
endif

SPI_TARGET=nxp
endif

# Default ARM ASM setting for unrecognized AARCH64 targets
ifeq ($(filter zynq versal nxp_ls1028a,$(TARGET)),)
NO_ARM_ASM?=1
endif

ifeq ($(SPMATH),1)
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113 changes: 113 additions & 0 deletions config/examples/versal_vmk180.config
Original file line number Diff line number Diff line change
@@ -0,0 +1,113 @@
# wolfBoot configuration for AMD Versal VMK180 - DDR Boot (U-Boot Replacement)
# Versal Prime VM1802 ACAP - Dual ARM Cortex-A72
#
# This configuration replaces U-Boot in the Versal boot flow:
# PLM -> PSM -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1)
#
# wolfBoot entry point is 0x8000000 in DDR, running at EL2 (non-secure)
# All clock, MIO, and DDR initialization is done by PLM/PSM before wolfBoot starts

ARCH?=AARCH64
TARGET?=versal

WOLFBOOT_VERSION?=1

# ECC-384 with SHA-384 (good balance of security and performance)
SIGN?=ECC384
HASH?=SHA384
IMAGE_HEADER_SIZE?=512

# RSA 4096-bit with SHA3-384 (alternative)
#SIGN?=RSA4096
#HASH?=SHA3
#IMAGE_HEADER_SIZE?=1024

# Debug options
DEBUG?=1
DEBUG_SYMBOLS=1
DEBUG_UART=1

# Boot Benchmarking (optional):
# Enables timing of boot operations (flash read, integrity, signature).
BOOT_BENCHMARK?=1

VTOR?=1
CORTEX_M0?=0
NO_ASM?=0
ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=0
V?=0
SPMATH?=1
RAM_CODE?=0
DUALBANK_SWAP?=0
PKA?=0
WOLFTPM?=0

# Flash configuration
EXT_FLASH?=1
NO_XIP=1

# ELF loading support
ELF?=1

# Toolchain
USE_GCC=1
CROSS_COMPILE=aarch64-none-elf-

# ============================================================================
# Boot Memory Layout
# ============================================================================
# wolfBoot runs from DDR at 0x8000000 (same address as U-Boot)
# This matches the partition header from PetaLinux BOOT.BIN:
# exec_addr: 0x08000000, load_addr: 0x08000000
# EL: el-2, trustzone: non-secure, aarch-64
WOLFBOOT_ORIGIN=0x8000000

# Optional debugging with OCRAM
# Versal Gen 1 (VMK180): OCM is 256KB at 0xFFFC0000 - 0xFFFFFFFF
# Versal Gen 2: OCM is 2MB at 0xFFE00000 - 0xFFFFFFFF
#WOLFBOOT_ORIGIN=0xFFFC0000

# Flash Sector Size (QSPI)
WOLFBOOT_SECTOR_SIZE=0x20000

# Application Partition Size (44MB)
WOLFBOOT_PARTITION_SIZE=0x2C00000

# Location in Flash for Primary Boot Partition
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x800000

# Load Partition to RAM Address (Linux kernel loads here)
WOLFBOOT_LOAD_ADDRESS?=0x10000000

# Location in Flash for Secondary Partition (update image)
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x3400000

# Location to store wolfBoot state/swap
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x6000000

# DTS (Device Tree) - matches addresses from BOOT.BIN analysis
WOLFBOOT_LOAD_DTS_ADDRESS?=0x1000
WOLFBOOT_DTS_BOOT_ADDRESS?=0x7B0000
WOLFBOOT_DTS_UPDATE_ADDRESS?=0x39B0000

# Speed up reads by using larger blocks
CFLAGS_EXTRA+=-DWOLFBOOT_SHA_BLOCK_SIZE=4096

# UART Configuration - UART0 for APU console
CFLAGS_EXTRA+=-DDEBUG_UART_NUM=0

# QSPI Reference Clock: Ref (300MHz default for Versal)
#CFLAGS_EXTRA+=-DGQSPI_CLK_REF=300000000

# QSPI Bus Divisor: (2 << div) = BUS (0=div2, 1=div4, 2=div8)
# MT25QU01G max: 133MHz Quad Read (0x6C) with 8 dummy cycles
# div=0: 300MHz/2 = 150MHz (above spec but tested working)
# div=1: 300MHz/4 = 75MHz (within spec, default)
# div=2: 300MHz/8 = 37.5MHz (conservative)
#CFLAGS_EXTRA+=-DGQSPI_CLK_DIV=1

# QSPI flash options (uncomment to enable)
#CFLAGS_EXTRA+=-DDEBUG_QSPI # Enable QSPI debug logging
#CFLAGS_EXTRA+=-DGQSPI_MODE_IO # Use polling instead of DMA (slower)
#CFLAGS_EXTRA+=-DTEST_EXT_FLASH # Run flash erase/write/read test
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