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fix(i2c): harden slave v2 transactions - #121
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WalkthroughChangesThe I2C slave v2 driver now tracks receive-buffer overflow and pending read requests. It reports overflow in receive events, improves ISR FIFO handling, updates allocation errors, enables an auto-start workaround, and coordinates pending-request writes with stretch release. I2C slave v2 behavior
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🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@components/esp_driver_i2c/i2c_slave_v2.c`:
- Around line 71-72: Remove the ISR dependency on operation_mux in the FIFO
service paths, including the checks around the address-match and FIFO handlers,
so ISR servicing continues when a task owns the mutex. Refactor i2c_slave_write
and related operation_mux usage so the mutex is not held across blocking
xRingbufferSend operations; preserve FIFO draining and stretch clearing through
an immediately available ISR path or guaranteed deferred retry.
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📒 Files selected for processing (4)
components/esp_driver_i2c/i2c_private.hcomponents/esp_driver_i2c/i2c_slave_v2.ccomponents/esp_driver_i2c/include/driver/i2c_types.hcomponents/hal/esp32/include/hal/i2c_ll.h
| if (xSemaphoreTakeFromISR(i2c_slave->operation_mux, &xTaskWoken) != pdTRUE) { | ||
| return xTaskWoken; |
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🩺 Stability & Availability | 🔴 Critical | 🏗️ Heavy lift
Do not block ISR FIFO service with operation_mux.
At Lines 71-72 and Lines 102-104, the ISR stops servicing FIFO data when a task owns operation_mux. i2c_slave_write acquires the same mutex at Lines 394-396 and can block in xRingbufferSend while the TX ring buffer is full.
If a master then starts a read, the address-match handler cannot load queued TX data or clear stretch. The master cannot consume the TX ring buffer. A write with timeout_ms == -1 then waits forever.
Do not hold this mutex across blocking ring-buffer operations. Keep FIFO service available to the ISR, or add a guaranteed deferred retry that drains the FIFO and clears stretch after contention.
Also applies to: 102-104, 157-164, 228-228, 394-396
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@components/esp_driver_i2c/i2c_slave_v2.c` around lines 71 - 72, Remove the
ISR dependency on operation_mux in the FIFO service paths, including the checks
around the address-match and FIFO handlers, so ISR servicing continues when a
task owns the mutex. Refactor i2c_slave_write and related operation_mux usage so
the mutex is not held across blocking xRingbufferSend operations; preserve FIFO
draining and stretch clearing through an immediately available ISR path or
guaranteed deferred retry.
## Summary - Correct the 10-bit controller read address sequence. - Add an ISR-context transmit provider to the I2C target-v2 callbacks, allowing a fixed register map to provide bytes without waiting for an application task. - Report the transmitted byte count after the transaction so the provider can advance register state safely. ## Dependencies - Builds on #121. - Required by toitlang/toit#3155. ## Testing Exercised by Toit's autonomous register-target hardware suite on ESP32 and ESP32-S3, including 7-bit/10-bit addressing, register wrapping, updates, and oversized writes. <sub>Stack created with <a href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Summary
Consumer
Required by toitlang/toit#3154.
Testing
Exercised by Toit's two-board target, register-target, and async-controller hardware suites on ESP32 and ESP32-S3.
Stack created with GitHub Stacks CLI • Give Feedback 💬