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fix(i2c): harden slave v2 transactions - #121

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floitsch merged 3 commits into
patch-head-5.4.2from
floitsch/i2c-target-fixes
Aug 10, 2026
Merged

floitsch merged 3 commits into
patch-head-5.4.2from
floitsch/i2c-target-fixes

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@floitsch floitsch commented Aug 6, 2026 •

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Summary

  • Harden the I2C target-v2 state machine across repeated starts, reads, writes, STOP handling, and transaction completion.
  • Correct callback/event ordering and byte accounting so an event-driven runtime can safely retain and release transaction buffers.
  • Add the low-level ESP32 support needed for reliable target transaction boundaries.

Consumer

Required by toitlang/toit#3154.

Testing

Exercised by Toit's two-board target, register-target, and async-controller hardware suites on ESP32 and ESP32-S3.

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coderabbitai Bot commented Aug 10, 2026 •

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Review Change Stack

Walkthrough

Changes

The I2C slave v2 driver now tracks receive-buffer overflow and pending read requests. It reports overflow in receive events, improves ISR FIFO handling, updates allocation errors, enables an auto-start workaround, and coordinates pending-request writes with stretch release.

I2C slave v2 behavior

Layer / File(s) Summary
Receive and request state contracts
components/esp_driver_i2c/i2c_private.h, components/esp_driver_i2c/include/driver/i2c_types.h, components/hal/esp32/include/hal/i2c_ll.h
The slave state tracks receive overflow and pending requests. Receive events expose overflow status, and the HAL adds an ACK-waiting helper.
ISR FIFO and transaction flow
components/esp_driver_i2c/i2c_slave_v2.c
ISR FIFO handlers now protect semaphore access, record dropped receive bytes, report receive completion, and load queued transmit data during request handling.
Initialization and pending-request writes
components/esp_driver_i2c/i2c_slave_v2.c
Initialization uses cleanup-based allocation errors and enables the ESP32-S3 and ESP32-C3 auto-start workaround. i2c_slave_write now handles semaphore timeouts, pending-request FIFO state, conditional TX interrupts, and stretch release.

Estimated code review effort: 3 (Moderate) | ~20 minutes

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Description check ✅ Passed The description accurately summarizes the I2C target-v2 hardening, event ordering, buffer ownership, low-level support, and testing.
Title check ✅ Passed The title clearly and concisely describes the main change: hardening I2C slave version 2 transactions.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
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🧪 Generate unit tests (beta)
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  • Commit unit tests in branch floitsch/i2c-target-fixes

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Actionable comments posted: 1

🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@components/esp_driver_i2c/i2c_slave_v2.c`:
- Around line 71-72: Remove the ISR dependency on operation_mux in the FIFO
service paths, including the checks around the address-match and FIFO handlers,
so ISR servicing continues when a task owns the mutex. Refactor i2c_slave_write
and related operation_mux usage so the mutex is not held across blocking
xRingbufferSend operations; preserve FIFO draining and stretch clearing through
an immediately available ISR path or guaranteed deferred retry.
🪄 Autofix

Fix all unresolved CodeRabbit comments on this PR:

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Configuration used: Organization UI

Review profile: CHILL

Plan: Pro Plus

Run ID: 145ba99e-82f7-4b46-97cc-dd493aaf96ca

📥 Commits

Reviewing files that changed from the base of the PR and between ded0ae5 and 844f0bd.

📒 Files selected for processing (4)
  • components/esp_driver_i2c/i2c_private.h
  • components/esp_driver_i2c/i2c_slave_v2.c
  • components/esp_driver_i2c/include/driver/i2c_types.h
  • components/hal/esp32/include/hal/i2c_ll.h

Comment on lines +71 to +72
if (xSemaphoreTakeFromISR(i2c_slave->operation_mux, &xTaskWoken) != pdTRUE) {
return xTaskWoken;

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🩺 Stability & Availability | 🔴 Critical | 🏗️ Heavy lift

Do not block ISR FIFO service with operation_mux.

At Lines 71-72 and Lines 102-104, the ISR stops servicing FIFO data when a task owns operation_mux. i2c_slave_write acquires the same mutex at Lines 394-396 and can block in xRingbufferSend while the TX ring buffer is full.

If a master then starts a read, the address-match handler cannot load queued TX data or clear stretch. The master cannot consume the TX ring buffer. A write with timeout_ms == -1 then waits forever.

Do not hold this mutex across blocking ring-buffer operations. Keep FIFO service available to the ISR, or add a guaranteed deferred retry that drains the FIFO and clears stretch after contention.

Also applies to: 102-104, 157-164, 228-228, 394-396

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@components/esp_driver_i2c/i2c_slave_v2.c` around lines 71 - 72, Remove the
ISR dependency on operation_mux in the FIFO service paths, including the checks
around the address-match and FIFO handlers, so ISR servicing continues when a
task owns the mutex. Refactor i2c_slave_write and related operation_mux usage so
the mutex is not held across blocking xRingbufferSend operations; preserve FIFO
draining and stretch clearing through an immediately available ISR path or
guaranteed deferred retry.

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lgtm

@floitsch
floitsch marked this pull request as ready for review August 10, 2026 14:58
@floitsch
floitsch merged commit de07eb5 into patch-head-5.4.2 Aug 10, 2026
2 checks passed
@floitsch
floitsch deleted the floitsch/i2c-target-fixes branch August 10, 2026 21:44
floitsch added a commit that referenced this pull request Aug 10, 2026
## Summary

- Correct the 10-bit controller read address sequence.
- Add an ISR-context transmit provider to the I2C target-v2 callbacks,
allowing a fixed register map to provide bytes without waiting for an
application task.
- Report the transmitted byte count after the transaction so the
provider can advance register state safely.

## Dependencies

- Builds on #121.
- Required by toitlang/toit#3155.

## Testing

Exercised by Toit's autonomous register-target hardware suite on ESP32
and ESP32-S3, including 7-bit/10-bit addressing, register wrapping,
updates, and oversized writes.

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