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1 change: 1 addition & 0 deletions aarch64-miri-tests.txt
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
test_vld2
test_vld3
test_vld4
neon::load_tests
Expand Down
18 changes: 2 additions & 16 deletions crates/core_arch/src/aarch64/neon/generated.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11741,14 +11741,7 @@ pub unsafe fn vld2q_dup_u64(a: *const u64) -> uint64x2x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_f64(a: *const f64) -> float64x2x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v2f64.p0"
)]
fn _vld2q_f64(ptr: *const float64x2_t) -> float64x2x2_t;
}
_vld2q_f64(a as _)
crate::core_arch::macros::deinterleaving_load!(f64, 2, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s64)"]
Expand All @@ -11759,14 +11752,7 @@ pub unsafe fn vld2q_f64(a: *const f64) -> float64x2x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_s64(a: *const i64) -> int64x2x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v2i64.p0"
)]
fn _vld2q_s64(ptr: *const int64x2_t) -> int64x2x2_t;
}
_vld2q_s64(a as _)
crate::core_arch::macros::deinterleaving_load!(i64, 2, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_lane_f64)"]
Expand Down
99 changes: 11 additions & 88 deletions crates/core_arch/src/arm_shared/neon/generated.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19597,14 +19597,7 @@ pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v4f16.p0"
)]
fn _vld2_f16(ptr: *const f16) -> float16x4x2_t;
}
_vld2_f16(a as _)
crate::core_arch::macros::deinterleaving_load!(f16, 4, 2, a)
}
#[doc = "Load single 2-element structure and replicate to all lanes of two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f16)"]
Expand All @@ -19621,14 +19614,7 @@ pub unsafe fn vld2_f16(a: *const f16) -> float16x4x2_t {
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
#[cfg(not(target_arch = "arm64ec"))]
pub unsafe fn vld2q_f16(a: *const f16) -> float16x8x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v8f16.p0"
)]
fn _vld2q_f16(ptr: *const f16) -> float16x8x2_t;
}
_vld2q_f16(a as _)
crate::core_arch::macros::deinterleaving_load!(f16, 8, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_f32)"]
Expand Down Expand Up @@ -19768,14 +19754,7 @@ pub unsafe fn vld2q_s32(a: *const i32) -> int32x4x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2_f32(a: *const f32) -> float32x2x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v2f32.p0"
)]
fn _vld2_f32(ptr: *const float32x2_t) -> float32x2x2_t;
}
_vld2_f32(a as _)
crate::core_arch::macros::deinterleaving_load!(f32, 2, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_f32)"]
Expand All @@ -19787,14 +19766,7 @@ pub unsafe fn vld2_f32(a: *const f32) -> float32x2x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_f32(a: *const f32) -> float32x4x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v4f32.p0"
)]
fn _vld2q_f32(ptr: *const float32x4_t) -> float32x4x2_t;
}
_vld2q_f32(a as _)
crate::core_arch::macros::deinterleaving_load!(f32, 4, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s8)"]
Expand All @@ -19806,14 +19778,7 @@ pub unsafe fn vld2q_f32(a: *const f32) -> float32x4x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2_s8(a: *const i8) -> int8x8x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v8i8.p0"
)]
fn _vld2_s8(ptr: *const int8x8_t) -> int8x8x2_t;
}
_vld2_s8(a as _)
crate::core_arch::macros::deinterleaving_load!(i8, 8, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s8)"]
Expand All @@ -19825,14 +19790,7 @@ pub unsafe fn vld2_s8(a: *const i8) -> int8x8x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_s8(a: *const i8) -> int8x16x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v16i8.p0"
)]
fn _vld2q_s8(ptr: *const int8x16_t) -> int8x16x2_t;
}
_vld2q_s8(a as _)
crate::core_arch::macros::deinterleaving_load!(i8, 16, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s16)"]
Expand All @@ -19844,14 +19802,7 @@ pub unsafe fn vld2q_s8(a: *const i8) -> int8x16x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2_s16(a: *const i16) -> int16x4x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v4i16.p0"
)]
fn _vld2_s16(ptr: *const int16x4_t) -> int16x4x2_t;
}
_vld2_s16(a as _)
crate::core_arch::macros::deinterleaving_load!(i16, 4, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s16)"]
Expand All @@ -19863,14 +19814,7 @@ pub unsafe fn vld2_s16(a: *const i16) -> int16x4x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_s16(a: *const i16) -> int16x8x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v8i16.p0"
)]
fn _vld2q_s16(ptr: *const int16x8_t) -> int16x8x2_t;
}
_vld2q_s16(a as _)
crate::core_arch::macros::deinterleaving_load!(i16, 8, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_s32)"]
Expand All @@ -19882,14 +19826,7 @@ pub unsafe fn vld2q_s16(a: *const i16) -> int16x8x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2_s32(a: *const i32) -> int32x2x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v2i32.p0"
)]
fn _vld2_s32(ptr: *const int32x2_t) -> int32x2x2_t;
}
_vld2_s32(a as _)
crate::core_arch::macros::deinterleaving_load!(i32, 2, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2q_s32)"]
Expand All @@ -19901,14 +19838,7 @@ pub unsafe fn vld2_s32(a: *const i32) -> int32x2x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(ld2))]
pub unsafe fn vld2q_s32(a: *const i32) -> int32x4x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v4i32.p0"
)]
fn _vld2q_s32(ptr: *const int32x4_t) -> int32x4x2_t;
}
_vld2q_s32(a as _)
crate::core_arch::macros::deinterleaving_load!(i32, 4, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_lane_f16)"]
Expand Down Expand Up @@ -20580,14 +20510,7 @@ pub unsafe fn vld2_s64(a: *const i64) -> int64x1x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
#[cfg_attr(test, assert_instr(nop))]
pub unsafe fn vld2_s64(a: *const i64) -> int64x1x2_t {
unsafe extern "unadjusted" {
#[cfg_attr(
any(target_arch = "aarch64", target_arch = "arm64ec"),
link_name = "llvm.aarch64.neon.ld2.v1i64.p0"
)]
fn _vld2_s64(ptr: *const int64x1_t) -> int64x1x2_t;
}
_vld2_s64(a as _)
crate::core_arch::macros::deinterleaving_load!(i64, 1, 2, a)
}
#[doc = "Load multiple 2-element structures to two registers"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld2_u64)"]
Expand Down
15 changes: 3 additions & 12 deletions crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
Original file line number Diff line number Diff line change
Expand Up @@ -3674,19 +3674,10 @@ intrinsics:
safety:
unsafe: [neon]
types:
- ["*const f64", float64x2x2_t, f64, float64x2_t]
- ["*const i64", int64x2x2_t, i64, int64x2_t]
- ["*const f64", float64x2x2_t, f64, "2"]
- ["*const i64", int64x2x2_t, i64, "2"]
compose:
- LLVMLink:
name: "vld2.{neon_type[1]}"
arguments:
- "ptr: *const {neon_type[3]}"
links:
- link: "llvm.aarch64.neon.ld2.v{neon_type[1].lane}{type[2]}.p0"
arch: aarch64,arm64ec
- FnCall:
- "_vld2{neon_type[1].nox}"
- - "a as _"
- FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "2", a], [], true]

- name: "vld2{neon_type[1].nox}"
doc: Load multiple 2-element structures to two registers
Expand Down
55 changes: 14 additions & 41 deletions crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
Original file line number Diff line number Diff line change
Expand Up @@ -2922,25 +2922,16 @@ intrinsics:
safety:
unsafe: [neon]
types:
- ["*const i8", int8x8x2_t, i8, int8x8_t]
- ["*const i16", int16x4x2_t, i16, int16x4_t]
- ["*const i32", int32x2x2_t, i32, int32x2_t]
- ["*const i8", int8x16x2_t, i8, int8x16_t]
- ["*const i16", int16x8x2_t, i16, int16x8_t]
- ["*const i32", int32x4x2_t, i32, int32x4_t]
- ["*const f32", float32x2x2_t, f32, float32x2_t]
- ["*const f32", float32x4x2_t, f32, float32x4_t]
- ["*const i8", int8x8x2_t, i8, "8"]
- ["*const i16", int16x4x2_t, i16, "4"]
- ["*const i32", int32x2x2_t, i32, "2"]
- ["*const i8", int8x16x2_t, i8, "16"]
- ["*const i16", int16x8x2_t, i16, "8"]
- ["*const i32", int32x4x2_t, i32, "4"]
- ["*const f32", float32x2x2_t, f32, "2"]
- ["*const f32", float32x4x2_t, f32, "4"]
compose:
- LLVMLink:
name: "vld2.{neon_type[1]}"
arguments:
- "ptr: *const {neon_type[3]}"
links:
- link: "llvm.aarch64.neon.ld2.v{neon_type[1].lane}{type[2]}.p0"
arch: aarch64,arm64ec
- FnCall:
- "_vld2{neon_type[1].nox}"
- - "a as _"
- FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "2", a], [], true]

- name: "vld2{neon_type[1].nox}"
doc: Load multiple 2-element structures to two registers
Expand All @@ -2953,18 +2944,9 @@ intrinsics:
safety:
unsafe: [neon]
types:
- ["*const i64", int64x1x2_t, i64, int64x1_t]
- ["*const i64", int64x1x2_t, i64, "1"]
compose:
- LLVMLink:
name: "vld2.{neon_type[1]}"
arguments:
- "ptr: *const {neon_type[3]}"
links:
- link: "llvm.aarch64.neon.ld2.v{neon_type[1].lane}{type[2]}.p0"
arch: aarch64,arm64ec
- FnCall:
- "_vld2{neon_type[1].nox}"
- - "a as _"
- FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "2", a], [], true]

- name: "vld2{neon_type[1].nox}"
doc: Load multiple 2-element structures to two registers
Expand Down Expand Up @@ -3468,19 +3450,10 @@ intrinsics:
safety:
unsafe: [neon]
types:
- ["*const f16", float16x4x2_t, f16]
- ["*const f16", float16x8x2_t, f16]
- ["*const f16", float16x4x2_t, f16, "4"]
- ["*const f16", float16x8x2_t, f16, "8"]
compose:
- LLVMLink:
name: "vld2.{neon_type[1]}"
arguments:
- "ptr: {type[0]}"
links:
- link: "llvm.aarch64.neon.ld2.v{neon_type[1].lane}{type[2]}.p0"
arch: aarch64,arm64ec
- FnCall:
- "_vld2{neon_type[1].nox}"
- - "a as _"
- FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "2", a], [], true]

- name: "vld2{neon_type[1].dup_nox}"
doc: Load single 2-element structure and replicate to all lanes of two registers
Expand Down
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