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[rl] Add vllm All-reduce patch in genearator#3759

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wwwjn merged 6 commits into
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patch-generator-ar
Jun 26, 2026
Merged

[rl] Add vllm All-reduce patch in genearator#3759
wwwjn merged 6 commits into
mainfrom
patch-generator-ar

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@wwwjn

@wwwjn wwwjn commented Jun 24, 2026

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This is clearly not compatible with other parallelism, it's TP only

  • So I think we can just leave the PR here for manually patch

Test

  • Adding benchmark to measure the perf gain
Screenshot 2026-06-24 at 12 14 11 AM

@meta-cla meta-cla Bot added the CLA Signed This label is managed by the Meta Open Source bot. label Jun 24, 2026
@wwwjn wwwjn changed the title [Do not merge] Add vllm All-reduce patch [Do not merge][rl] Add vllm All-reduce patch Jun 24, 2026
@fegin

fegin commented Jun 24, 2026

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We implemented this using PyTorch symmetric memory before and it was actually used internally afaik. The implementation even fuse bias addition, which will give you roughly 4 us improvement on small data, iirc. meta-pytorch/kraken#8

@wwwjn

wwwjn commented Jun 24, 2026

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We implemented this using PyTorch symmetric memory before and it was actually used internally afaik. The implementation even fuse bias addition, which will give you roughly 4 us improvement on small data, iirc. meta-pytorch/kraken#8

I briefly read the PR, seems the karken implementation brings roughly the same speedup with vllm's AR at smaller message. I also see vllm has a flag to enable their symmem AR . In my test above ( +21%) , it doesn't use symmetric memory and maybe dispatched to 1 shot AR. I tested enabling symmetric mem, but seems no more gains.

n00b question, does symmetric memory needs extra hardware support? If not, can we use karken override in titan?

w = self.weight
w_local = w.to_local() if isinstance(w, DTensor) else w
y = F.linear(x_local, w_local)
y = tensor_model_parallel_all_reduce(y)

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Can we only do ops level dispatch of torchtitan.distributed.All_reduce.

Only generator changes, should be a shorter patch

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I thought about this, one way to do this is to dispatch _AllReduce in spmd_types to TorchTitan's implementation. This will only work if everything is represented in spmd_types. The cost should be cheap.

@wwwjn
wwwjn force-pushed the patch-generator-ar branch from 83fcd67 to b677c1d Compare June 25, 2026 19:33
@wwwjn wwwjn changed the title [Do not merge][rl] Add vllm All-reduce patch [rl] Add vllm All-reduce patch in genearator Jun 25, 2026
@fegin

fegin commented Jun 25, 2026

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We can just copy the kraken implementation to TorchTitan, that would be an easier way to maintain. We wrote the code, and we know how to maintain. Or we can just use vllm's implementation.


c10d.all_reduce = all_reduce

# Force vLLM's TP custom AR onto its registered=False path (see point 2).

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This part is to avoid vLLM AR to use it's own cuda IPC buffer, which is not compatible with cudagraph.

This would not affect AR performance / speed (verification to be added)

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how is different from torch.ops.symm_mem.one_shot_all_reduce https://docs.pytorch.org/docs/2.12/symmetric_memory.html ?

@tianyu-l tianyu-l left a comment

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please address comments

Comment thread torchtitan/experiments/rl/models/vllm_wrapper.py
Comment thread torchtitan/experiments/rl/models/vllm_registry.py Outdated
Comment thread torchtitan/experiments/rl/models/vllm_wrapper.py Outdated
@wwwjn
wwwjn merged commit 7c951af into main Jun 26, 2026
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4 participants