[RVV] Add missing maxpool and avgpool rvv kernels

[ken-unger]

• Add rvv script to generate f32-avgpool and f16-avgpool rvv kernels
• Rewrite rvv script to generate f32-maxpool and add f16-maxpool, s8-maxpool, u8-maxpool rvv kernels
• Script now closely follows the simd version.

Relevant tests and benchmarks executed and pass (BPI-F3).

[ken-unger]

RE: rvv hardware detection support for fp16

@dsharlet just fyi, I've opened a PR in pytorch/cpuinfo for this purpose. Once that is reviewed and merged I can make the needed changes to hardware-config.c. pytorch/cpuinfo#375

While other changes in cpuinfo are desirable (e.g cache info for riscv uarchs) I tried to keep the changes to a minimum this round in the hope that the review goes smoothly.

[ken-unger]

@fbarchard please also give this PR a lookover when you have a few minutes. Thank you.