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arch/arm64/boot/dts/xilinx/zynqmp-ad9084-vpx: add fclk0-3 to keep - #3406

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arch/arm64/boot/dts/xilinx/zynqmp-ad9084-vpx: add fclk0-3 to keep#3406
omaganap wants to merge 1 commit into
analogdevicesinc:mainfrom
omaganap:dev-add-pl-fclk

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PR Description

Add fclk0-fclk3 nodes using the xlnx,fclk driver to explicitly hold PS-to-PL fabric clocks enabled. Without these, the Linux clock framework can gate the PL clocks, causing AXI accesses to PL peripherals (such as the SelectMAP FPGA manager at 0x93000000) to hang the CPU.

PR Type

  • Bug fix (a change that fixes an issue)
  • New feature (a change that adds new functionality)
  • Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

  • I have conducted a self-review of my own code changes
  • I have compiled my changes, including the documentation
  • I have tested the changes on the relevant hardware
  • I have updated the documentation outside this repo accordingly
  • I have provided links for the relevant upstream lore

Add fclk0-fclk3 nodes using the xlnx,fclk driver to explicitly
hold PS-to-PL fabric clocks enabled. Without these, the Linux
clock framework can gate the PL clocks, causing AXI accesses to
PL peripherals to hang the CPU.

Signed-off-by: Oscar Magana Pantoja <Oscar.MaganaPantoja@analog.com>
@omaganap

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@nunojsa , please review

compatible = "xlnx,fclk";
clocks = <&zynqmp_clk 74>;
status = "okay";
};

@nunojsa nunojsa Jul 20, 2026

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Why do we need the above? Note the below:

https://github.com/Xilinx/linux-xlnx/blob/master/drivers/staging/fclk/TODO#L2

So this is clearly an hack! We should just understand what peripherals are causing the cpu to block and add proper clocking support to those drivers.

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Yea I do not like this either but I couldn’t get the zynmp to boot with the original dts. Let me talk with the developers and see if we can come up with a permanent solution.

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2 participants