arch/arm64/boot/dts/xilinx/zynqmp-ad9084-vpx: add fclk0-3 to keep - #3406
Open
omaganap wants to merge 1 commit into
Open
arch/arm64/boot/dts/xilinx/zynqmp-ad9084-vpx: add fclk0-3 to keep#3406omaganap wants to merge 1 commit into
omaganap wants to merge 1 commit into
Conversation
omaganap
requested review from
CiprianRegus,
amiclaus,
btogorean,
buha,
chegbeli,
danmois,
dbogdan,
machschmitt,
mhennerich,
nunojsa,
rbolboac and
stefpopa
as code owners
June 29, 2026 20:20
omaganap
force-pushed
the
dev-add-pl-fclk
branch
2 times, most recently
from
June 30, 2026 12:37
bb20234 to
39001d8
Compare
Add fclk0-fclk3 nodes using the xlnx,fclk driver to explicitly hold PS-to-PL fabric clocks enabled. Without these, the Linux clock framework can gate the PL clocks, causing AXI accesses to PL peripherals to hang the CPU. Signed-off-by: Oscar Magana Pantoja <Oscar.MaganaPantoja@analog.com>
omaganap
force-pushed
the
dev-add-pl-fclk
branch
from
July 13, 2026 13:29
39001d8 to
8860da2
Compare
Contributor
Author
|
@nunojsa , please review |
nunojsa
reviewed
Jul 20, 2026
| compatible = "xlnx,fclk"; | ||
| clocks = <&zynqmp_clk 74>; | ||
| status = "okay"; | ||
| }; |
Collaborator
There was a problem hiding this comment.
Why do we need the above? Note the below:
https://github.com/Xilinx/linux-xlnx/blob/master/drivers/staging/fclk/TODO#L2
So this is clearly an hack! We should just understand what peripherals are causing the cpu to block and add proper clocking support to those drivers.
Contributor
Author
There was a problem hiding this comment.
Yea I do not like this either but I couldn’t get the zynmp to boot with the original dts. Let me talk with the developers and see if we can come up with a permanent solution.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
PR Description
Add fclk0-fclk3 nodes using the xlnx,fclk driver to explicitly hold PS-to-PL fabric clocks enabled. Without these, the Linux clock framework can gate the PL clocks, causing AXI accesses to PL peripherals (such as the SelectMAP FPGA manager at 0x93000000) to hang the CPU.
PR Type
PR Checklist