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1. Verilog-Based-Verification-of-a-MOD-10-Counter-Design Verilog-Based-Verification-of-a-MOD-10-Counter-Design Public

   The MOD-10 counter was functionally verified using a Verilog testbench to validate reset, load, increment, and rollover operations. Out of 2987 executed test cases, 2937 passed successfully, achiev…

   Verilog 1

2. Understanding_Python Understanding_Python Public

   This repository is my Python learning journey through the freeCodeCamp Python course (https://www.freecodecamp.org/learn/python-v9/ ). It includes hands-on projects and practical exercises related …

   Python 1

3. RAM_Verification RAM_Verification Public

   A 1024x8 synchronous RAM was verified using directed tests with task-based stimulus for better code density. Line coverage reached 100%, but toggle coverage is ~50–57%, showing limited signal activ…

   Verilog 1

4. Verilog_Clock_Frequency_Calculator Verilog_Clock_Frequency_Calculator Public

   Exploring clock frequency calculation, testbench clock generation, and clock scaling techniques.

   HTML 1

5. Understanding_Debounce Understanding_Debounce Public

   Debouncing is a technique used in digital hardware to eliminate unwanted multiple transitions caused by mechanical switch bouncing and produce a single stable signal.

   Verilog 1

6. WHY-CMOS-IS-LIKE-THIS WHY-CMOS-IS-LIKE-THIS Public

   Knowing the reason why pullup is PMOS and pulldown is NMOS in CMOS

   AGS Script 1